Dr. Uwe H. Meyer-Baese (IEEE, S'91-M'93) was born in Kassel, Germany, on July 10, 1964. He received his BSEE, MSEE, and Ph.D. "Summa cum Laude" from the Darmstadt University of Technology in 1987, 1989, and 1995, respectively. In 1994 and 1995, he held a Postdoctoral Position in "Institute of Brain Research," Magdeburg, Germany. In 1996 and 1997, he was a Visiting Professor at the University of Florida, Gainesville. From 1998 to 2000, he worked as a Research Scientist in the ASIC industry. He joint Electrical and Computer Engineering Department at the FAMU-FSU College of Engineering in 2001 and is now an Associate Professor. He holds 3 patents, has published over 100 journal and conference papers, 5 books, and supervised more than 60 master thesis projects in the real-time DSP/FPGA area. He is author of the best-selling Springer textbook on DSP with FPGAs. He was a recipient of the Max-Kade Award in Neuroengineering in 1997, ECE Department Research Award in 2005, Who's Who in Science member in 2005, SPIE, Best Presentation Award in 2006, FAMU-FSU College of Engineering Teaching Award in 2007, and the Humboldt Fellow in 2009. He has served as Faculty Senator of the FSU senate since Spring 2011. He has been an elected member of the editorial board for the journal Signal, Image and Video Processing for 2011–2015 and has been elected as a board member as well as an associate editor for the EURASIP Journal of Advances in Signal Processing for 2011–2013.
Botella, G., Martín, J, Santos, M., & Meyer-Baese, U. (2011). "FPGA-Based Multimodal Embedded Sensor System Integrating Low- and Mid-Level Vision". Sensors, 11(8), 8164-8179.
Meyer-Baese, U., Vera, A., Meyer-Baese, A., Pattichis, M., & Perry, R. (2010). "An Undergraduate Course and Laboratory in Digital Signal Processing with Field Programmable Gate Arrays". IEEE Transaction on Educations, 53(4), 638-645.
Botella, G., Garcia, A., Rodriguez-Alvarez, M., Ros, E., Meyer-Baese, U., & Molina, M. C. (2010). "Robust Bioinspired Architecture for Optical-Flow Computation". IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 18(4), 616-629.